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tegra124: Enable PWM clock, and set up PWM1 pin

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Configure pin H1 for PWM1, and enable the PWM clock.

BUG=none
TEST=emerge-nyan chromeos-coreboot-nyan

Change-Id: I2f91ebd4666bd227686c08cedf3c1aa7abbe8215
Signed-off-by: Andrew Chew <achew@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/185770
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
This commit is contained in:
Andrew Chew 2014-02-10 16:33:54 -08:00 • committed by chrome-internal-fetch
commit 069636d929
1 changed files with 5 additions and 1 deletions
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6
src/mainboard/google/nyan/mainboard.c
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@ -201,6 +201,10 @@ static void setup_pinmux(void)
PINMUX_DAP2_FS_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
pinmux_set_config(PINMUX_DAP2_SCLK_INDEX,
PINMUX_DAP2_SCLK_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
/* PWM1 */
pinmux_set_config(PINMUX_GPIO_PH1_INDEX,
PINMUX_GPIO_PH1_FUNC_PWM1 | PINMUX_PULL_NONE);
}
static void setup_kernel_info(void)
@ -250,7 +254,7 @@ static void mainboard_init(device_t dev)
clock_enable_clear_reset(CLK_L_GPIO | CLK_L_I2C1 | CLK_L_SDMMC4 |
CLK_L_I2S0 | CLK_L_I2S1 | CLK_L_I2S2 |
CLK_L_SPDIF | CLK_L_USBD | CLK_L_DISP1 |
CLK_L_HOST1X,
CLK_L_HOST1X | CLK_L_PWM,
CLK_H_I2C2 | CLK_H_SBC1 | CLK_H_PMC |
CLK_H_USB3,