From 066c8c81df8be9ae9ab7b33342a93b0b3ea7b240 Mon Sep 17 00:00:00 2001 From: Kane Chen Date: Thu, 21 Aug 2014 10:36:17 -0700 Subject: [PATCH] broadwell: fixed power gating enable for disabled sata port The original code won't set power gating for disabled port correctly, due to it must be set before Lock BUG=chrome-os-partner:28234 BRANCH=None TEST=build and boot on samus verify bit 24, 26 is set in RCBA(0x3a84) for samus Signed-off-by: Kane Chen Change-Id: Id78d391ac657665a972cb4fd1810df6304a5a6ab Reviewed-on: https://chromium-review.googlesource.com/213561 Reviewed-by: Duncan Laurie Tested-by: Kane Chen Commit-Queue: Kane Chen --- src/soc/intel/broadwell/finalize.c | 3 +++ src/soc/intel/broadwell/lpc.c | 2 -- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/soc/intel/broadwell/finalize.c b/src/soc/intel/broadwell/finalize.c index 67cba66db7..2f2009a456 100644 --- a/src/soc/intel/broadwell/finalize.c +++ b/src/soc/intel/broadwell/finalize.c @@ -100,6 +100,9 @@ static void broadwell_finalize(void *unused) reg_script_run_on_dev(SA_DEV_ROOT, system_agent_finalize_script); reg_script_run_on_dev(PCH_DEV_LPC, pch_finalize_script); + /* Lock */ + RCBA32_OR(0x3a6c, 0x00000001); + /* Read+Write the following registers */ MCHBAR32(0x6030) = MCHBAR32(0x6030); MCHBAR32(0x6034) = MCHBAR32(0x6034); diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index cb8bb1438f..eda528e0ba 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -347,8 +347,6 @@ static void pch_pm_init(struct device *dev) if (RCBA32(FD) & PCH_DISABLE_ADSPD) RCBA32_OR(0x2b1c, (1 << 29)); - /* Lock */ - RCBA32_OR(0x3a6c, 0x00000001); } static void pch_cg_init(device_t dev)