From 0639ac796010285af90a0457cb48c1c76b1bc97e Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Tue, 13 Apr 2004 19:53:58 +0000 Subject: [PATCH] adds and mods for vga --- src/northbridge/via/vt8623/Config | 2 + src/northbridge/via/vt8623/new_crt.c | 146 +++++++++++++++++++++++++++ src/northbridge/via/vt8623/via_vga.c | 77 ++++++++++++++ 3 files changed, 225 insertions(+) create mode 100644 src/northbridge/via/vt8623/new_crt.c create mode 100644 src/northbridge/via/vt8623/via_vga.c diff --git a/src/northbridge/via/vt8623/Config b/src/northbridge/via/vt8623/Config index 5191cb272f..78fa5d7ae5 100644 --- a/src/northbridge/via/vt8623/Config +++ b/src/northbridge/via/vt8623/Config @@ -1 +1,3 @@ object northbridge.o +object via_vga.o + diff --git a/src/northbridge/via/vt8623/new_crt.c b/src/northbridge/via/vt8623/new_crt.c new file mode 100644 index 0000000000..be2d5f1a73 --- /dev/null +++ b/src/northbridge/via/vt8623/new_crt.c @@ -0,0 +1,146 @@ +#define VIA_BIOS_REG_TABLE_MAX_NUM 32 +#define t_outb(val,reg) outb(val,reg) +#define t_inb(reg) inb(reg) + +typedef struct _VIABIOSREGTABLE { + unsigned char port[VIA_BIOS_REG_TABLE_MAX_NUM]; + unsigned char offset[VIA_BIOS_REG_TABLE_MAX_NUM]; + unsigned char mask[VIA_BIOS_REG_TABLE_MAX_NUM]; + unsigned char data[VIA_BIOS_REG_TABLE_MAX_NUM]; + int numEntry; +} VIABIOSRegTableRec; + +typedef struct _VIABIOSSTDVGATABLE { + unsigned char columns; + unsigned char rows; + unsigned char fontHeight; + unsigned int pageSize; + unsigned char SR[5]; + unsigned char misc; + unsigned char CR[25]; + unsigned char AR[20]; + unsigned char GR[9]; +} VIABIOSStdVGATableRec; + +typedef struct _VIAVMODEENTRY { + unsigned short Width; + unsigned short Height; + unsigned short Bpp; + unsigned short Mode; + unsigned short MemNeed; + unsigned short MClk; + unsigned short VClk; + VIABIOSStdVGATableRec stdVgaTable; + VIABIOSRegTableRec extModeExtTable; +} VIAModeEntry; + +VIAModeEntry Mode= { 640, 400, 8, 0X30, 4, 0X432E, 0X86B1, { 80, 24, 16, 0X8000, { 0, 0X1, 0XF, 0, 0XE }, 0X4F, { 0X61, 0X4F, 0X4F, 0X85, 0X53, 0X9B, 0XA3, 0X1F, 0, 0X40, 0X1E, 0, 0, 0, 0, 0, 0X90, 0X63, 0X8F, 0X50, 0X40, 0X8F, 0XA4, 0X23, 0XFF }, { 0, 0X1, 0X2, 0X3, 0X4, 0X5, 0X6, 0X7, 0X8, 0X9, 0XA, 0XB, 0XC, 0XD, 0XE, 0XF, 0X41, 0, 0XF, 0 }, { 0, 0, 0, 0, 0, 0X40, 0X5, 0XF, 0XFF } }, { { 0XC4, 0XD4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { 0X15, 0X33, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { 0XFE, 0X27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { 0X22, 0X26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, 2 } }; + +static inline unsigned char read3X4(int reg) +{ + outb(reg, 0x3D4); + return inb(0x3D5); +} + +static inline void write3X4(int reg, unsigned char val) +{ + outb(reg, 0x3D4); + outb(val, 0x3D5); +} + +static inline unsigned char read3C4(int reg) +{ + t_outb(reg, 0x3C4); + return t_inb(0x3C5); +} + +static inline void write3C4(int reg, unsigned char val) +{ + t_outb(reg, 0x3C4); + t_outb(val, 0x3C5); +} + +static inline unsigned char read3CE(int reg) +{ + t_outb(reg, 0x3CE); + return t_inb(0x3CF); +} + +static inline void writeAttr(int reg, unsigned char val) +{ + t_inb(0x3DA); + t_outb(reg, 0x3C0); + t_outb(val, 0x3C0); +} + +static inline unsigned char readAttr(int reg) +{ + t_inb(0x3DA); + t_outb(reg, 0x3C0); + return t_inb(0x3C1); +} + +static inline void write3CE(int reg, unsigned char val) +{ + t_outb(reg, 0x3CE); + t_outb(val, 0x3CF); +} + +void setmode() +{ + int j, k = 0; + int port, offset, mask, data; + + /* Turn off Screen */ + write3X4(0x17, read3X4(0x17) & 0x7f); + + /* Set Sequences regs */ + for (j = 1; j < 5; j++) { + write3C4(j, Mode.stdVgaTable.SR[j]); + } + /* Set Misc reg */ + t_outb(Mode.stdVgaTable.misc,0x3c2); + /* Set CRTC regs */ + for (j = 0; j < 25; j++) { + write3X4(j,Mode.stdVgaTable.CR[j]); + } + /* Set attribute regs */ + for (j = 0; j < 20; j++) { + writeAttr(j,Mode.stdVgaTable.AR[j]); + } + for (j = 0; j < 9; j++) { + write3CE(j,Mode.stdVgaTable.GR[j]); + } + + /* Unlock Extended regs */ + write3C4(0x10, 0x01); + + /* Set Extended Mode-Spec. Extend Regs */ + for (j = 0; j < Mode.extModeExtTable.numEntry; j++) { + port = Mode.extModeExtTable.port[j]; + offset = Mode.extModeExtTable.offset[j]; + mask = Mode.extModeExtTable.mask[j]; + data = Mode.extModeExtTable.data[j] & mask; + t_outb(offset, 0x300+port); + t_outb(data, 0x301+port); + } + + k= 0; + write3X4(0x17, read3X4(0x17) & 0x7F); + + write3C4(0x46, (Mode.VClk >> 8)); + write3C4(0x47, (Mode.VClk & 0xFF)); + + write3X4(0x17, read3X4(0x17) | 0x80); + + write3C4(0x40, read3C4(0x40) | 0x02); + write3C4(0x40, read3C4(0x40) & 0xFD); + + /* Use external clock */ + t_outb(t_inb(0x3cc) | 0x0C, 0x3c2); + + /* Open Screen */ + t_inb(0x3da); + t_outb(0x20, 0x3c0); +} + diff --git a/src/northbridge/via/vt8623/via_vga.c b/src/northbridge/via/vt8623/via_vga.c new file mode 100644 index 0000000000..3e98e118a8 --- /dev/null +++ b/src/northbridge/via/vt8623/via_vga.c @@ -0,0 +1,77 @@ +/* + * + * By + * Dmitry Borisov( jbors@mail.sourceforge.net + * + */ + +#include +#include +#include +#include +#include +#include +#include + +// splash_done is a global to avoid putting up splash screen twice. +// Kind of a hack, but the problem is that the vga pci resources +// are sometimes ready early, sort of, and the initial call to +// vga_hardware_fixup puts up the splash screen; then a later call +// to it from hardware_main does it again; but this does not always +// happen, sometimes it fails the first call. It is either a timing or initialization +// problem that needs to be tracked down and fixed. Note that both calls (fixup) are necessary +// since some vga boards are not ready early, but some are, and of course, the epia is sometimes ready +// and sometimes not ready. +// +int splash_done = 0; + +void delay(int secs); +int vga_decode_var(struct screeninfo *var, struct vga_par *par); +int vga_load_pcx( char * pcx_file, int pcx_file_length); +int vga_set_regs(struct vga_par *par); +extern struct screeninfo vga_settings; +void vga_set_gmode(void); + +#ifdef VGA_HARDWARE_FIXUP + +void vga_hardware_fixup(void) +{ + u8 *pcx_file; + int *file_size; + int res; + struct vga_par vga_params; + + // convert the general vga parameters in screeninfo structure + // to actual vga register settings + res = vga_decode_var(&vga_settings, &vga_params); + if ( res < 0 ) { post_code (0xFD); } //no error return for now + + // write the registers + res = vga_set_regs( &vga_params ); + +#ifdef PCX_FILE_LOCATION + pcx_file = (u8 *) PCX_FILE_LOCATION; +#else + pcx_file = (u8 *) 0xfffd0000; +#endif + file_size = (int *) pcx_file; + + if (!splash_done) { + printk_debug("Setting graphics mode...\n"); + //setmode(); + vga_set_gmode(); + +#ifdef VIDEO_SHOW_LOGO + // + // the pcx_file is in flash at an address set + // in the config file with PCX_FILE_LOCATION + // the length of the file is at offset 0, file starts at 4 + // + + printk_debug("pcx file at %x length %d\n",&pcx_file[4], *file_size); + vga_load_pcx( &pcx_file[4], *file_size); +#endif + splash_done++; // mark done + } +} +#endif