diff --git a/src/northsouthbridge/sis/630/ipl.S b/src/northsouthbridge/sis/630/ipl.S
index 7b894fa922..9005ddef3d 100644
--- a/src/northsouthbridge/sis/630/ipl.S
+++ b/src/northsouthbridge/sis/630/ipl.S
@@ -235,7 +235,9 @@ flash_command:
 
 flash_address:
 	shll	$0x08, %ebx
-        movw	$0x03, %cx
+        movb	$0x03, %cl			# this one is DANGEROUS but I am
+						# sure the upper 3 bytes == 0x00
+	
 	movb	$0x05, 0x04(%di)		# start address cycle
 0:
 	movb	%bl, (%si)			# write address to CDSNIO
@@ -248,7 +250,8 @@ wait_for_flash_ready:
 	/* delay by reding NOP register before polling the FLASH READY bit,
 	   this is inlined to save a call/ret pair */
 doc_delay:
-	movw	$4, %cx
+	movb	$0x04, %cl			# this one is DANGEROUS but I am
+						# sure the upper 3 bytes == 0x00
 0:
 	movb	0x20(%di), %al			# read DOC NOP retisger
 	loop	0b				# four times