diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 88869018a4..5331f0e42f 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -669,6 +669,7 @@ config BOARD_GOOGLE_ULDREN
 	select INTEL_GMA_HAVE_VBT
 
 config BOARD_GOOGLE_ULDRENITE
+	select ALDERLAKE_CONFIGURE_DESCRIPTOR
 	select BOARD_GOOGLE_BASEBOARD_TRULO
 	select CHROMEOS_WIFI_SAR if CHROMEOS
 	select DRIVERS_WWAN_FM350GL
diff --git a/src/mainboard/google/brya/variants/uldrenite/Makefile.mk b/src/mainboard/google/brya/variants/uldrenite/Makefile.mk
index c31fa307d0..0f152afe62 100644
--- a/src/mainboard/google/brya/variants/uldrenite/Makefile.mk
+++ b/src/mainboard/google/brya/variants/uldrenite/Makefile.mk
@@ -1,6 +1,7 @@
 ## SPDX-License-Identifier: GPL-2.0-only
 
 bootblock-y += gpio.c
+bootblock-y += variant.c
 romstage-y += gpio.c
 romstage-y += memory.c
 ramstage-y += gpio.c
diff --git a/src/mainboard/google/brya/variants/uldrenite/variant.c b/src/mainboard/google/brya/variants/uldrenite/variant.c
index 421799694a..cbaf20bac8 100644
--- a/src/mainboard/google/brya/variants/uldrenite/variant.c
+++ b/src/mainboard/google/brya/variants/uldrenite/variant.c
@@ -2,10 +2,12 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
+#include <boardid.h>
 #include <console/console.h>
 #include <delay.h>
 #include <fw_config.h>
 #include <sar.h>
+#include <soc/bootblock.h>
 
 const char *get_wifi_sar_cbfs_filename(void)
 {
@@ -75,3 +77,30 @@ void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
 		printk(BIOS_INFO, "Configured External FIVR\n");
 	}
 }
+
+void variant_update_descriptor(void)
+{
+	uint32_t board_version = board_id();
+
+	/* b/404126972: Only this phase has M/B with both FIVR and MBVR. */
+	if (board_version != 1)
+		return;
+
+	/* VccanaVrLocation = "VCCANA is CPU FIVR" */
+	struct descriptor_byte fivr_bytes[] = {
+		{ 0xc33,  0x32 }
+	};
+
+	/* VccanaVrLocation = "VCCANA is Platform VR" */
+	struct descriptor_byte mbvr_bytes[] = {
+		{ 0xc33,  0x72 }
+	};
+
+	if (fw_config_probe(FW_CONFIG(EXT_VR, EXT_VR_PRESENT))) {
+		printk(BIOS_INFO, "Configuring descriptor for MBVR\n");
+		configure_descriptor(mbvr_bytes, ARRAY_SIZE(mbvr_bytes));
+	} else {
+		printk(BIOS_INFO, "Configuring descriptor for FIVR\n");
+		configure_descriptor(fivr_bytes, ARRAY_SIZE(fivr_bytes));
+	}
+}