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armv7: add wrapper for DCCSW (data cache clean by set/way)

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This adds a wrapper for data cache clean (without invalidate)
by set/way.

Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=none
BRANCH=none
TEST=tested in follow-up patches

Change-Id: I09ee1563890350a6c1d04f1b96ac5d0c042e2af2
Reviewed-on: https://gerrit.chromium.org/gerrit/66118
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
This commit is contained in:
David Hendricks 2013-08-16 12:17:50 -07:00 • committed by ChromeBot
commit 05bc4f8564
2 changed files with 14 additions and 0 deletions
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6
src/arch/armv7/cache.c
View file

@ -76,6 +76,7 @@ void icache_invalidate_all(void)
}
enum dcache_op {
OP_DCCSW,
OP_DCCISW,
OP_DCISW,
OP_DCCIMVAC,
@ -179,6 +180,11 @@ void dcache_clean_invalidate_all(void)
dcache_foreach(OP_DCCISW);
}
void dcache_clean_all(void)
{
dcache_foreach(OP_DCCSW);
}
void dcache_invalidate_all(void)
{
dcache_foreach(OP_DCISW);

8
src/arch/armv7/include/arch/cache.h
View file

@ -170,6 +170,12 @@ static inline void dccmvac(unsigned long mva)
asm volatile ("mcr p15, 0, %0, c7, c10, 1" : : "r" (mva) : "memory");
}
/* data cache clean by set/way */
static inline void dccsw(uint32_t val)
{
asm volatile ("mcr p15, 0, %0, c7, c10, 2" : : "r" (val) : "memory");
}
/* data cache invalidate by MVA to PoC */
static inline void dcimvac(unsigned long mva)
{
@ -289,6 +295,8 @@ void dcache_clean_by_mva(unsigned long addr, unsigned long len);
/* dcache clean and invalidate by modified virtual address to PoC */
void dcache_clean_invalidate_by_mva(unsigned long addr, unsigned long len);
void dcache_clean_all(void);
/* dcache invalidate all (on current level given by CCSELR) */
void dcache_invalidate_all(void);