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Move CAR settings for all GX1, GX2, LX and Intel Slot2 boards to the CPU.

Browse source 
This automatically adds the settings for those boards that didn't have settings
at all yet. Also, small fixup to compareboard.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

--> Please help porting all boards from newconfig to Kconfig <--

This is a lot of janitor work and we can use your helping hands.
The sooner we can get rid of Kbuild, the better. The KBuild report
on the mailing list shows the config differences between newconfig
and Kconfig. In theory, all Kconfig configs should be equal to their
newconfig pendant. In practice it's better to come close but stay 
clean.

--> Please help porting all boards from newconfig to Kconfig <--



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-02-04 01:32:43 +00:00 • committed by Stefan Reinauer
commit 04d74b1fdd
13 changed files with 62 additions and 81 deletions
Download patch file Download diff file Expand all files Collapse all files

10
src/mainboard/amd/db800/Kconfig
View file

@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 4
depends on BOARD_AMD_DB800
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_AMD_DB800
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_AMD_DB800
config RAMBASE
hex
default 0x4000

10
src/mainboard/amd/norwich/Kconfig
View file

@ -31,16 +31,6 @@ config IRQ_SLOT_COUNT
default 6
depends on BOARD_AMD_NORWICH
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_AMD_NORWICH
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_AMD_NORWICH
config RAMBASE
hex
default 0x4000

10
src/mainboard/artecgroup/dbe61/Kconfig
View file

@ -31,16 +31,6 @@ config IRQ_SLOT_COUNT
default 3
depends on BOARD_ARTECGROUP_DBE61
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_ARTECGROUP_DBE61
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_ARTECGROUP_DBE61
config RAMBASE
hex
default 0x4000

10
src/mainboard/digitallogic/msm800sev/Kconfig
View file

@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 9
depends on BOARD_DIGITALLOGIC_MSM800SEV
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_DIGITALLOGIC_MSM800SEV
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_DIGITALLOGIC_MSM800SEV
config RAMBASE
hex
default 0x4000

10
src/mainboard/iei/pcisa-lx-800-r10/Kconfig
View file

@ -31,16 +31,6 @@ config IRQ_SLOT_COUNT
default 9
depends on BOARD_IEI_PCISA_LX_800_R10
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_IEI_PCISA_LX_800_R10
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_IEI_PCISA_LX_800_R10
config RAMBASE
hex
default 0x4000

10
src/mainboard/lippert/roadrunner-lx/Kconfig
View file

@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 7
depends on BOARD_LIPPERT_ROADRUNNER_LX
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_LIPPERT_ROADRUNNER_LX
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_LIPPERT_ROADRUNNER_LX
config RAMBASE
hex
default 0x4000

10
src/mainboard/lippert/spacerunner-lx/Kconfig
View file

@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 7
depends on BOARD_LIPPERT_SPACERUNNER_LX
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_LIPPERT_SPACERUNNER_LX
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_LIPPERT_SPACERUNNER_LX
config RAMBASE
hex
default 0x4000

10
src/mainboard/pcengines/alix1c/Kconfig
View file

@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 5
depends on BOARD_PCENGINES_ALIX1C
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_PCENGINES_ALIX1C
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_PCENGINES_ALIX1C
config RAMBASE
hex
default 0x4000