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exynos5250: Fix PMU register address map

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Patch 12b121f3fe introduced an off-by-one error in the offsets of the
PMU register struct, which put both the newly added register and the
PSHOLD that comes after it in the wrong place. This patch corrects the
offsets (5420 had already been correct).

Change-Id: I1d9d31a6a73ee91890824e94fbd247d5feb4f6ae
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179411
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 5fdc74bc18)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6892
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Julius Werner 2013-12-09 15:42:53 -08:00 • committed by Isaac Christensen
commit 04b01893a9
1 changed files with 2 additions and 2 deletions
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4
src/soc/samsung/exynos5250/power.h
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@ -58,8 +58,8 @@ struct exynos5_power {
uint32_t inform0; /* 0x0800 */
uint32_t inform1; /* 0x0804 */
uint8_t reserved6[0x1f8];
uint32_t pmu_debug; /* 0x0A00*/
uint8_t reserved7[0x2728];
uint32_t pmu_debug; /* 0x0a00 */
uint8_t reserved7[0x2724];
uint32_t padret_uart_opt; /* 0x3128 */
uint8_t reserved8[0x1e0];
uint32_t ps_hold_ctrl; /* 0x330c */