diff --git a/src/soc/intel/common/feature/espi/Kconfig b/src/soc/intel/common/feature/espi/Kconfig
new file mode 100644
index 0000000000..521c7bbe5c
--- /dev/null
+++ b/src/soc/intel/common/feature/espi/Kconfig
@@ -0,0 +1,8 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+config SOC_INTEL_COMMON_FEATURE_ESPI
+	bool
+	help
+	  Select this if the platform supports common eSPI/LPC initialization
+	  with generic IO decode range configuration and standard interrupt
+	  setup. This is applicable for most modern Intel client platforms.
diff --git a/src/soc/intel/common/feature/espi/Makefile.mk b/src/soc/intel/common/feature/espi/Makefile.mk
new file mode 100644
index 0000000000..69542218b3
--- /dev/null
+++ b/src/soc/intel/common/feature/espi/Makefile.mk
@@ -0,0 +1,5 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+bootblock-$(CONFIG_SOC_INTEL_COMMON_FEATURE_ESPI) += espi.c
+romstage-$(CONFIG_SOC_INTEL_COMMON_FEATURE_ESPI) += espi.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_FEATURE_ESPI) += espi.c
diff --git a/src/soc/intel/common/feature/espi/espi.c b/src/soc/intel/common/feature/espi/espi.c
new file mode 100644
index 0000000000..b0620c683d
--- /dev/null
+++ b/src/soc/intel/common/feature/espi/espi.c
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <arch/ioapic.h>
+#include <device/pci.h>
+#include <intelblocks/itss.h>
+#include <intelblocks/lpc_lib.h>
+#include <intelpch/espi.h>
+#include <pc80/i8259.h>
+#include <pc80/isa-dma.h>
+#include <soc/iomap.h>
+#include <soc/irq.h>
+#include <soc/pci_devs.h>
+#include <soc/soc_chip.h>
+#include <static.h>
+
+void soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES])
+{
+	const config_t *config = config_of_soc();
+
+	gen_io_dec[0] = config->gen1_dec;
+	gen_io_dec[1] = config->gen2_dec;
+	gen_io_dec[2] = config->gen3_dec;
+	gen_io_dec[3] = config->gen4_dec;
+}
+
+void lpc_soc_init(struct device *dev)
+{
+	/* Legacy initialization */
+	isa_dma_init();
+	pch_misc_init();
+
+	/* Enable CLKRUN_EN for power gating ESPI */
+	lpc_enable_pci_clk_cntl();
+
+	/* Set ESPI Serial IRQ mode */
+	if (CONFIG(SERIRQ_CONTINUOUS_MODE))
+		lpc_set_serirq_mode(SERIRQ_CONTINUOUS);
+	else
+		lpc_set_serirq_mode(SERIRQ_QUIET);
+
+	/* Interrupt configuration */
+	pch_enable_ioapic();
+	pch_pirq_init();
+	setup_i8259();
+	i8259_configure_irq_trigger(9, 1);
+}