From 03fca0f0b4c328cc1bf336e4eb74c0235cb2f1da Mon Sep 17 00:00:00 2001
From: Elmo Lan <elmo_lan@realtek.corp-partner.google.com>
Date: Tue, 17 Jun 2025 14:46:29 +0800
Subject: [PATCH] mb/google/brox: Enable support for Realtek EC

Add support for Realtek EC on brox_rtk_ec board.

BUG=b:414474440
TEST=FW_NAME=brox_rtk_ec emerge-brox coreboot chromeos-bootimage
     flash to brox board with realtek rts5915
     Boot normally and got those message from ap console:

[DEBUG]	Google Chrome EC uptime: 107.108 seconds
[DEBUG]	Google Chrome AP resets since EC boot: 2
[DEBUG]	Google Chrome most recent AP reset causes:
[DEBUG]		10.479: 32775 shutdown: entering G3
[DEBUG]		92.102: 8 reset: during EC initialization
[DEBUG]	Google Chrome EC reset flags at last EC boot: watchdog | sysjump
[DEBUG]	PNP: 0c09.0 init finished in 81 msecs

Change-Id: I65eaff78b6260548e8f30051a97ffadb69ec69c9
Signed-off-by: Elmo Lan <elmo_lan@realtek.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88122
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Jayvik Desai <jayvik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/ec/google/chromeec/Kconfig        | 4 ++++
 src/mainboard/google/brox/Kconfig     | 2 ++
 src/mainboard/google/brox/bootblock.c | 5 +++++
 3 files changed, 11 insertions(+)

diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig
index 8e037f2496..fbd4758e71 100644
--- a/src/ec/google/chromeec/Kconfig
+++ b/src/ec/google/chromeec/Kconfig
@@ -222,6 +222,10 @@ config EC_GOOGLE_CHROMEEC_LPC_GENERIC_MEMORY_BASE
 	hex
 	default 0xfe0b0000
 
+config EC_GOOGLE_CHROMEEC_LPC_GENERIC_MEMORY_SIZE
+	hex
+	default 0x10000
+
 endif # EC_GOOGLE_CHROMEEC
 
 source "src/ec/google/chromeec/*/Kconfig"
diff --git a/src/mainboard/google/brox/Kconfig b/src/mainboard/google/brox/Kconfig
index d48b342782..a94995a168 100644
--- a/src/mainboard/google/brox/Kconfig
+++ b/src/mainboard/google/brox/Kconfig
@@ -63,6 +63,8 @@ config BOARD_GOOGLE_BROX_RTK_EC
 	select BOARD_GOOGLE_BASEBOARD_BROX
 	select CHROMEOS_WIFI_SAR if CHROMEOS
 	select USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AND_NON_UFS
+	select EC_GOOGLE_CHROMEEC_RTK
+	select EC_GOOGLE_CHROMEEC_LPC_GENERIC_MEMORY_RANGE
 
 config BOARD_GOOGLE_BROX_TI_PDC
 	select BOARD_GOOGLE_BASEBOARD_BROX
diff --git a/src/mainboard/google/brox/bootblock.c b/src/mainboard/google/brox/bootblock.c
index 3a5f785582..31309ad411 100644
--- a/src/mainboard/google/brox/bootblock.c
+++ b/src/mainboard/google/brox/bootblock.c
@@ -4,6 +4,7 @@
 #include <baseboard/variants.h>
 #include <bootblock_common.h>
 #include <bootmode.h>
+#include <intelblocks/lpc_lib.h>
 #include <reset.h>
 #include <security/vboot/vboot_common.h>
 
@@ -25,6 +26,10 @@ void bootblock_mainboard_init(void)
 		board_reset();
 	}
 	variant_update_descriptor();
+
+	if (CONFIG(EC_GOOGLE_CHROMEEC_LPC_GENERIC_MEMORY_RANGE))
+		lpc_open_mmio_window(CONFIG_EC_GOOGLE_CHROMEEC_LPC_GENERIC_MEMORY_BASE,
+			CONFIG_EC_GOOGLE_CHROMEEC_LPC_GENERIC_MEMORY_SIZE);
 }
 
 void __weak variant_update_descriptor(void) {}