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Fixes to mainboard to get it to build.

Browse source 
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@733 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2008-08-10 22:05:08 +00:00
commit 0358903e52
3 changed files with 26 additions and 2 deletions
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10
mainboard/gigabyte/m57sli/Makefile
View file

@ -21,9 +21,15 @@
STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o \
$(obj)/mainboard/$(MAINBOARDDIR)/option_table.c \
$(obj)/southbridge/nvidia/mcp55/stage1_smbus.o
$(obj)/southbridge/nvidia/mcp55/stage1_smbus.o \
$(obj)/mainboard/$(MAINBOARDDIR)/initram.o \
$(obj)/northbridge/amd/k8/raminit.o \
$(obj)/northbridge/amd/k8/coherent_ht.o \
$(obj)/northbridge/amd/k8/incoherent_ht.o
INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c
# I can't get this to work -- if you can fix it do so. The file above
# from "initram" on should be here.
INITRAM_SRC=
STAGE2_MAINBOARD_SRC =

1
mainboard/gigabyte/m57sli/initram.c
View file

@ -29,6 +29,7 @@
#include <string.h>
#include <msr.h>
#include <io.h>
#include <cpu.h>
#include <amd/k8/k8.h>
#include <spd.h>

17
mainboard/gigabyte/m57sli/stage1.c
View file

@ -23,12 +23,29 @@
#include <lib.h>
#include <console.h>
#include <device/device.h>
#include <cpu.h>
#include <amd/k8/k8.h>
#include <amd/k8/sysconf.h>
#include <device/pci.h>
#include <string.h>
#include <msr.h>
#include <io.h>
#include <arch/x86/msr.h>
void memreset_setup(void)
{
}
void memreset(int controllers, const struct mem_controller *ctrl)
{
}
void activate_spd_rom(const struct mem_controller *ctrl)
{
/* nothing to do */
}
void hardware_stage1(void)
{
post_code(POST_START_OF_MAIN);