From 033ba96516805502673ac7404bc97e6ce4e2a934 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Mon, 28 Apr 2014 16:39:40 -0700 Subject: [PATCH] coreboot arm64: Add support for arm64 into coreboot framework Add support for enabling different coreboot stages (bootblock, romstage and ramstage) to have arm64 architecture. Most of the files have been copied over from arm/ or arm64-generic work. BUG=None BRANCH=None TEST=Compiled successfully for rush board with bootblock being armv4 and romstage and ramstage being armv8 Change-Id: Icd59bec55c963a471a50e30972a8092e4c9d2fb2 Signed-off-by: Furquan Shaikh Reviewed-on: https://chromium-review.googlesource.com/197397 Reviewed-by: Aaron Durbin Commit-Queue: Furquan Shaikh Tested-by: Furquan Shaikh --- Makefile.inc | 5 +- src/Kconfig | 6 +- src/arch/aarch64/Kconfig | 30 -- src/arch/aarch64/Makefile.inc | 271 ------------------ src/arch/aarch64/include/assembler.h | 48 ---- src/arch/arm64/Kconfig | 14 + src/arch/arm64/Makefile.inc | 137 +++++++++ src/arch/arm64/armv8/Kconfig | 9 + src/arch/arm64/armv8/Makefile.inc | 74 +++++ .../bootblock.inc => arm64/armv8/bootblock.S} | 0 .../armv8}/bootblock_simple.c | 4 +- src/arch/{aarch64 => arm64/armv8}/cache.c | 6 +- src/arch/{aarch64 => arm64/armv8}/cpu.S | 0 src/arch/{aarch64 => arm64/armv8}/exception.c | 0 .../{aarch64 => arm64/armv8}/exception_asm.S | 0 src/arch/{aarch64 => arm64}/boot.c | 0 .../bootblock.lds => arm64/bootblock.ld} | 24 +- src/arch/{aarch64 => arm64}/cbmem.c | 0 src/arch/arm64/cpu.c | 42 +++ .../{aarch64/include/utils.h => arm64/div0.c} | 45 +-- src/arch/arm64/eabi_compat.c | 28 ++ src/arch/{aarch64 => arm64}/early_console.c | 0 src/arch/{aarch64/id.inc => arm64/id.S} | 2 + .../{aarch64 => arm64}/include/arch/asm.h | 6 +- .../include/arch/boot/boot.h | 4 +- .../include/arch/byteorder.h | 0 .../include/arch/early_variables.h | 0 .../{aarch64 => arm64}/include/arch/hlt.h | 0 src/arch/{aarch64 => arm64}/include/arch/io.h | 0 .../{aarch64 => arm64}/include/arch/pci_ops.h | 4 +- .../{aarch64 => arm64}/include/arch/stages.h | 0 .../include/armv8}/arch/barrier.h | 0 .../include/armv8}/arch/cache.h | 81 +----- .../include/armv8}/arch/cpu.h | 1 + .../include/armv8}/arch/exception.h | 0 .../include/armv8}/arch/rules.h | 0 .../include/bootblock_common.h | 0 src/arch/{aarch64 => arm64}/include/clocks.h | 0 .../{aarch64 => arm64}/include/smp/spinlock.h | 2 +- src/arch/{aarch64 => arm64}/include/stdint.h | 6 +- src/arch/arm64/memcpy.S | 52 ++++ src/arch/arm64/memmove.S | 55 ++++ src/arch/{aarch64 => arm64}/memset.S | 0 src/arch/{aarch64 => arm64}/ramstage.ld | 0 src/arch/{aarch64 => arm64}/romstage.ld | 25 +- src/arch/{aarch64 => arm64}/stages.c | 24 +- src/arch/{aarch64 => arm64}/tables.c | 17 ++ src/arch/arm64/timestamp.c | 29 ++ toolchain.inc | 5 +- util/cbfstool/common.c | 2 +- 50 files changed, 544 insertions(+), 514 deletions(-) delete mode 100644 src/arch/aarch64/Kconfig delete mode 100644 src/arch/aarch64/Makefile.inc delete mode 100644 src/arch/aarch64/include/assembler.h create mode 100644 src/arch/arm64/Kconfig create mode 100644 src/arch/arm64/Makefile.inc create mode 100644 src/arch/arm64/armv8/Kconfig create mode 100644 src/arch/arm64/armv8/Makefile.inc rename src/arch/{aarch64/bootblock.inc => arm64/armv8/bootblock.S} (100%) rename src/arch/{aarch64 => arm64/armv8}/bootblock_simple.c (95%) rename src/arch/{aarch64 => arm64/armv8}/cache.c (97%) rename src/arch/{aarch64 => arm64/armv8}/cpu.S (100%) rename src/arch/{aarch64 => arm64/armv8}/exception.c (100%) rename src/arch/{aarch64 => arm64/armv8}/exception_asm.S (100%) rename src/arch/{aarch64 => arm64}/boot.c (100%) rename src/arch/{aarch64/bootblock.lds => arm64/bootblock.ld} (80%) rename src/arch/{aarch64 => arm64}/cbmem.c (100%) create mode 100644 src/arch/arm64/cpu.c rename src/arch/{aarch64/include/utils.h => arm64/div0.c} (57%) create mode 100644 src/arch/arm64/eabi_compat.c rename src/arch/{aarch64 => arm64}/early_console.c (100%) rename src/arch/{aarch64/id.inc => arm64/id.S} (96%) rename src/arch/{aarch64 => arm64}/include/arch/asm.h (91%) rename src/arch/{aarch64 => arm64}/include/arch/boot/boot.h (69%) rename src/arch/{aarch64 => arm64}/include/arch/byteorder.h (100%) rename src/arch/{aarch64 => arm64}/include/arch/early_variables.h (100%) rename src/arch/{aarch64 => arm64}/include/arch/hlt.h (100%) rename src/arch/{aarch64 => arm64}/include/arch/io.h (100%) rename src/arch/{aarch64 => arm64}/include/arch/pci_ops.h (93%) rename src/arch/{aarch64 => arm64}/include/arch/stages.h (100%) rename src/arch/{aarch64/include => arm64/include/armv8}/arch/barrier.h (100%) rename src/arch/{aarch64/include => arm64/include/armv8}/arch/cache.h (81%) rename src/arch/{aarch64/include => arm64/include/armv8}/arch/cpu.h (97%) rename src/arch/{aarch64/include => arm64/include/armv8}/arch/exception.h (100%) rename src/arch/{aarch64/include => arm64/include/armv8}/arch/rules.h (100%) rename src/arch/{aarch64 => arm64}/include/bootblock_common.h (100%) rename src/arch/{aarch64 => arm64}/include/clocks.h (100%) rename src/arch/{aarch64 => arm64}/include/smp/spinlock.h (58%) rename src/arch/{aarch64 => arm64}/include/stdint.h (94%) create mode 100644 src/arch/arm64/memcpy.S create mode 100644 src/arch/arm64/memmove.S rename src/arch/{aarch64 => arm64}/memset.S (100%) rename src/arch/{aarch64 => arm64}/ramstage.ld (100%) rename src/arch/{aarch64 => arm64}/romstage.ld (81%) rename src/arch/{aarch64 => arm64}/stages.c (66%) rename src/arch/{aarch64 => arm64}/tables.c (82%) create mode 100644 src/arch/arm64/timestamp.c diff --git a/Makefile.inc b/Makefile.inc index a5d3efc9d3..9d220b1c13 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -53,7 +53,7 @@ PHONY+= clean-abuild coreboot lint lint-stable build-dirs subdirs-y := src/lib src/console src/device src/ec src/southbridge src/soc subdirs-y += src/northbridge src/superio src/drivers src/cpu src/vendorcode subdirs-y += util/cbfstool util/sconfig util/nvramtool -subdirs-y += src/arch/arm src/arch/x86 +subdirs-y += src/arch/arm src/arch/arm64 src/arch/x86 subdirs-y += src/mainboard/$(MAINBOARDDIR) subdirs-y += site-local @@ -512,6 +512,9 @@ endif ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM),y) ROMSTAGE_ELF := romstage.elf endif +ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM64),y) +ROMSTAGE_ELF := romstage.elf +endif ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) ROMSTAGE_ELF := romstage_xip.elf endif diff --git a/src/Kconfig b/src/Kconfig index 12cd3e21ec..6d196e7a17 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -234,13 +234,13 @@ config ARCH_ARM bool default n -config ARCH_AARCH64 +config ARCH_ARM64 bool default n source src/arch/x86/Kconfig source src/arch/arm/Kconfig -source src/arch/aarch64/Kconfig +source src/arch/arm64/Kconfig menu "Chipset" @@ -270,6 +270,7 @@ config TPM default n select LPC_TPM if ARCH_X86 select I2C_TPM if ARCH_ARM + select I2C_TPM if ARCH_ARM64 help Enable this option to enable TPM support in coreboot. @@ -298,6 +299,7 @@ config HAVE_UART_IO_MAPPED bool default y if ARCH_X86 default n if ARCH_ARM + default n if ARCH_ARM64 config HAVE_UART_MEMORY_MAPPED bool diff --git a/src/arch/aarch64/Kconfig b/src/arch/aarch64/Kconfig deleted file mode 100644 index e66fc8bf3a..0000000000 --- a/src/arch/aarch64/Kconfig +++ /dev/null @@ -1,30 +0,0 @@ -menu "Architecture (aarch64)" - -config ARM_AARCH64_OPTIONS - bool - default y - select BOOTBLOCK_CONSOLE -# select HAVE_ARCH_MEMSET -# select HAVE_ARCH_MEMCPY -# select HAVE_ARCH_MEMMOVE - -# Maximum reboot count -# TODO: Improve description. -config MAX_REBOOT_CNT - int - default 3 - -config BOOTBLOCK_SOURCE - string - default "bootblock_simple.c" - -config UPDATE_IMAGE - bool "Update existing coreboot.rom image" - default n - help - If this option is enabled, no new coreboot.rom file - is created. Instead it is expected that there already - is a suitable file for further processing. - The bootblock will not be modified. - -endmenu diff --git a/src/arch/aarch64/Makefile.inc b/src/arch/aarch64/Makefile.inc deleted file mode 100644 index a3cbec7dad..0000000000 --- a/src/arch/aarch64/Makefile.inc +++ /dev/null @@ -1,271 +0,0 @@ -################################################################################ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2012 The ChromiumOS Authors -### Copyright (C) 2012 Alexandru Gagniuc -## Copyright (C) 2009-2010 coresystems GmbH -## Copyright (C) 2009 Ronald G. Minnich -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## -################################################################################ - -################################################################################ -# Build the final rom image -COREBOOT_ROM_DEPENDENCIES:= -ifeq ($(CONFIG_PAYLOAD_ELF),y) -COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE) -endif - -extract_nth=$(word $(1), $(subst |, ,$(2))) - -ifneq ($(CONFIG_UPDATE_IMAGE),y) -prebuild-files = \ - $(foreach file,$(cbfs-files), \ - $(CBFSTOOL) $@.tmp \ - add$(if $(filter stage,$(call extract_nth,3,$(file))),-stage)$(if $(filter payload,$(call extract_nth,3,$(file))),-payload) \ - -f $(call extract_nth,1,$(file)) \ - -n $(call extract_nth,2,$(file)) $(if $(filter-out stage,$(call extract_nth,3,$(file))),-t $(call extract_nth,3,$(file))) \ - $(if $(call extract_nth,4,$(file)),-b $(call extract_nth,4,$(file))) &&) -prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file))) - -# TODO Change -b to Kconfig variable. -$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $(objcbfs)/romstage.elf $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file) - $(CBFSTOOL) $@.tmp create -m aarch64 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \ - -B $(objcbfs)/bootblock.bin -a 64 \ - -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) \ - -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) \ - -o $(CONFIG_CBFS_ROM_OFFSET) - @printf " CBFS $(subst $(obj)/,,$(@))\n" - $(CBFSTOOL) $@.tmp add-stage \ - -f $(objcbfs)/romstage.elf -b 0 \ - -n $(CONFIG_CBFS_PREFIX)/romstage -c none - $(prebuild-files) true - $(call add-cpu-microcode-to-cbfs,$@.tmp) - mv $@.tmp $@ -else -.PHONY: $(obj)/coreboot.pre -$(obj)/coreboot.pre: $(CBFSTOOL) - mv $(obj)/coreboot.rom $@ -endif - -$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) - @printf " CBFS $(subst $(obj)/,,$(@))\n" - cp $(obj)/coreboot.pre $@.tmp - $(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/ramstage.elf -n $(CONFIG_CBFS_PREFIX)/ramstage -c $(CBFS_COMPRESS_FLAG) -ifeq ($(CONFIG_PAYLOAD_NONE),y) - @printf " PAYLOAD none (as specified by user)\n" -endif -ifeq ($(CONFIG_PAYLOAD_ELF),y) - @printf " PAYLOAD $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) -endif -ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y) - @printf " CONFIG $(DOTCONFIG)\n" - if [ -f $(DOTCONFIG) ]; then \ - echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \ - sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \ - $(CBFSTOOL) $@.tmp add -f $(obj)/config.tmp -n config -t raw; rm -f $(obj)/config.tmp ; fi -endif - mv $@.tmp $@ - @printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n" - $(CBFSTOOL) $@ print - -bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE)) -bootsplash.jpg-type := bootsplash - -################################################################################ -# aarch64 specific tools - -################################################################################ -# Common recipes for all stages - -$(objcbfs)/%.bin: $(objcbfs)/%.elf - @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - $(OBJCOPY) -O binary $< $@ - -$(objcbfs)/%.elf: $(objcbfs)/%.debug - @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cp $< $@.tmp - $(NM) -n $@.tmp | sort > $(basename $@).map - $(OBJCOPY) --strip-debug $@.tmp - $(OBJCOPY) --add-gnu-debuglink=$< $@.tmp - mv $@.tmp $@ - -################################################################################ -# Build the ramstage (stage 2) - -$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/aarch64/ramstage.ld - @printf " CC $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/aarch64/ramstage.ld -else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/aarch64/ramstage.ld $< -endif - -$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME) - @printf " CC $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group -else - $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group -endif - -CFLAGS += -mstrict-align \ - -ldscripts = -ldscripts += $(src)/arch/aarch64/romstage.ld - -#crt0s += $(src)/cpu/arm/fpu_enable.inc - -crt0s += $(cpu_incs) -crt0s += $(cpu_incs-y) - -$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h - @printf " CC romstage.inc\n" - $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ - -# Things that appear in every board -ramstage-y += exception.c -ramstage-y += exception_asm.S - -bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += early_console.c -bootblock-y += cache.c -bootblock-y += cpu.S -bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception.c -bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception_asm.S - -romstage-y += cache.c -romstage-y += cpu.S -#romstage-y += div0.c -romstage-y += exception.c -romstage-y += exception_asm.S -romstage-$(CONFIG_EARLY_CONSOLE) += early_console.c -romstage-y += cbmem.c - -bootblock-y += stages.c -romstage-y += stages.c -ramstage-y += stages.c - -#ramstage-y += div0.c -#ramstage-y += interrupts.c -ramstage-y += cache.c -ramstage-y += cpu.S -#ramstage-y += mmu.c - -#romstage-y += eabi_compat.c -#ramstage-y += eabi_compat.c -#bootblock-y += eabi_compat.c - -ramstage-y += boot.c -ramstage-y += tables.c -ramstage-y += cbmem.c - -#romstage-y += memset.S -#ramstage-y += memset.S -#bootblock-y += memset.S -#romstage-y += memcpy.S -#ramstage-y += memcpy.S -#bootblock-y += memcpy.S -#romstage-y += memmove.S -#ramstage-y += memmove.S -#bootblock-y += memmove.S - -$(obj)/arch/aarch64/coreboot_table.ramstage.o : $(OPTION_TABLE_H) - -romstage-srcs += $(objgenerated)/crt0.s -ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) - -ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y) -#ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c -endif - -ifeq ($(CONFIG_HAVE_BUS_CONFIG),y) -#ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c -endif - -################################################################################ -# Build the bootblock - -bootblock_lds = $(src)/arch/aarch64/bootblock.lds -bootblock_lds += $(chipset_bootblock_lds) - -bootblock_inc += $(src)/arch/aarch64/bootblock.inc -bootblock_inc += $(chipset_bootblock_inc) -bootblock_inc += $(objgenerated)/bootblock.inc - -bootblock_custom = $(src)/$(call strip_quotes,$(CONFIG_BOOTBLOCK_CPU_INIT)) -bootblock_custom += $(src)/$(call strip_quotes,$(CONFIG_BOOTBLOCK_MAINBOARD_INIT)) - -$(objgenerated)/bootblock.ld: $$(bootblock_lds) $(obj)/ldoptions - @printf " GEN $(subst $(obj)/,,$(@))\n" - printf '$(foreach ldscript,ldoptions $(bootblock_lds),INCLUDE "$(ldscript)"\n)' > $@ - -$(objgenerated)/bootblock_inc.S: $$(bootblock_inc) - @printf " GEN $(subst $(obj)/,,$(@))\n" - printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@ - -$(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-S-ccopts) -Wa,-acdlns -c -o $@ $< > $(basename $@).disasm - -$(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-S-ccopts) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/aarch64/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ - -$(objgenerated)/bootblock.inc: $(src)/arch/aarch64/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(bootblock_custom) $(OPTION_TABLE_H) $(obj)/config.h - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-c-ccopts) $(INCLUDES) -MM \ - -MT$(objgenerated)/bootblock.inc \ - $< > $(objgenerated)/bootblock.inc.d - $(CC) $(bootblock-c-ccopts) -c -S $(CFLAGS) -I. $(INCLUDES) $< -o $@ - -$(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld $$(bootblock-objs) $(stages) $(obj)/config.h - @printf " LINK $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m armelf_linux_eabi -include $(obj)/config.h -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld -else - $(CC) -nostdlib -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(objgenerated)/bootblock.o $(bootblock-objs) $(stages) $(LIBGCC_FILE_NAME) -Wl,--end-group -endif - -################################################################################ -# Build the romstage - -$(objcbfs)/romstage.debug: $$(romstage-objs) $(stages_o) $(objgenerated)/romstage.ld - @printf " LINK $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage.ld -else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME) -Wl,--end-group -endif - -$(objgenerated)/romstage.ld: $$(ldscripts) $(obj)/ldoptions - @printf " GEN $(subst $(obj)/,,$(@))\n" - rm -f $@ - printf '$(foreach ldscript,ldoptions $(ldscripts),INCLUDE "$(ldscript:$(obj)/%=%)"\n)' >> $@.tmp - mv $@.tmp $@ - -$(objgenerated)/crt0.romstage.S: $$(crt0s) - @printf " GEN $(subst $(obj)/,,$(@))\n" - printf '$(foreach crt0,$(crt0s),#include "$(crt0:$(obj)/%=%)"\n)' > $@ - -$(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -Wa,-acdlns -c -o $@ $< > $(basename $@).disasm - -$(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/aarch64/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ - diff --git a/src/arch/aarch64/include/assembler.h b/src/arch/aarch64/include/assembler.h deleted file mode 100644 index 3c1068441c..0000000000 --- a/src/arch/aarch64/include/assembler.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * arch/arm/include/asm/assembler.h - * - * Copyright (C) 1996-2000 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This file contains arm architecture specific defines - * for the different processors. - * - * Do not include any C declarations in this file - it is included by - * assembler source. - */ - -/* - * Endian independent macros for shifting bytes within registers. - */ -#ifndef __ARMEB__ -#define pull lsr -#define push lsl -#define get_byte_0 lsl #0 -#define get_byte_1 lsr #8 -#define get_byte_2 lsr #16 -#define get_byte_3 lsr #24 -#define put_byte_0 lsl #0 -#define put_byte_1 lsl #8 -#define put_byte_2 lsl #16 -#define put_byte_3 lsl #24 -#else -#define pull lsl -#define push lsr -#define get_byte_0 lsr #24 -#define get_byte_1 lsr #16 -#define get_byte_2 lsr #8 -#define get_byte_3 lsl #0 -#define put_byte_0 lsl #24 -#define put_byte_1 lsl #16 -#define put_byte_2 lsl #8 -#define put_byte_3 lsl #0 -#endif - -/* - * Cache aligned - */ -#define CALGN(code...) code - diff --git a/src/arch/arm64/Kconfig b/src/arch/arm64/Kconfig new file mode 100644 index 0000000000..dc0e332ed2 --- /dev/null +++ b/src/arch/arm64/Kconfig @@ -0,0 +1,14 @@ +config ARCH_BOOTBLOCK_ARM64 + bool + default n + select ARCH_ARM64 + +config ARCH_ROMSTAGE_ARM64 + bool + default n + +config ARCH_RAMSTAGE_ARM64 + bool + default n + +source src/arch/arm64/armv8/Kconfig diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc new file mode 100644 index 0000000000..4d3278935f --- /dev/null +++ b/src/arch/arm64/Makefile.inc @@ -0,0 +1,137 @@ +################################################################################ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2014 Google Inc. +## Copyright (C) 2012-2013 The ChromiumOS Authors +## Copyright (C) 2012 Alexandru Gagniuc +## Copyright (C) 2009-2010 coresystems GmbH +## Copyright (C) 2009 Ronald G. Minnich +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## +################################################################################ + +################################################################################ +# Take care of subdirectories +################################################################################ + +subdirs-y += armv8/ + +################################################################################ +# ARM specific options +################################################################################ + +ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM64),y) +CBFSTOOL_PRE1_OPTS = -m arm64 -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) -o $(CONFIG_CBFS_ROM_OFFSET) +endif + +################################################################################ +# bootblock +################################################################################ + +ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARM64),y) + +bootblock-y += div0.c +bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += early_console.c + +bootblock-y += id.S +$(obj)/arch/arm64/id.bootblock.o: $(obj)/build.h + +bootblock-y += stages.c +bootblock-y += eabi_compat.c + +bootblock-y += memset.S +bootblock-y += memcpy.S +bootblock-y += memmove.S + +# Build the bootblock + +$(objcbfs)/bootblock.debug: $(src)/arch/arm64/bootblock.ld $(obj)/ldoptions $$(bootblock-objs) $(obj)/config.h + @printf " LINK $(subst $(obj)/,,$(@))\n" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) + $(LD_bootblock) -nostdlib -m armelf_linux_eabi --gc-sections -static -o $@ -L$(obj) $< -T $(src)/arch/arm64/bootblock.ld +else + $(CC_bootblock) $(CFLAGS_bootblock) -nostdlib -Wl,--gc-sections -static -o $@ -L$(obj) -T $(src)/arch/arm64/bootblock.ld -Wl,--start-group $(bootblock-objs) -Wl,--end-group +endif + +endif # CONFIG_ARCH_BOOTBLOCK_ARM64 + +################################################################################ +# romstage +################################################################################ + +ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM64),y) + +romstage-y += stages.c +romstage-y += div0.c +romstage-$(CONFIG_EARLY_CONSOLE) += early_console.c +romstage-y += eabi_compat.c +romstage-y += memset.S +romstage-y += memcpy.S +romstage-y += memmove.S +romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c + +# Build the romstage + +$(objcbfs)/romstage.debug: $$(romstage-objs) $(src)/arch/arm64/romstage.ld $(obj)/ldoptions + @printf " LINK $(subst $(obj)/,,$(@))\n" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) + $(LD_romstage) -nostdlib --gc-sections -static -o $@ -L$(obj) $(romstage-objs) -T $(src)/arch/arm64/romstage.ld +else + $(CC_romstage) $(CFLAGS_romstage) -nostdlib -Wl,--gc-sections -static -o $@ -L$(obj) -T $(src)/arch/arm64/romstage.ld -Wl,--start-group $(romstage-objs) -Wl,--end-group +endif + +endif # CONFIG_ARCH_ROMSTAGE_ARM64 + +################################################################################ +# ramstage +################################################################################ + +ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM64),y) + +ramstage-y += stages.c +ramstage-y += div0.c +ramstage-y += cpu.c +ramstage-y += eabi_compat.c +ramstage-y += boot.c +ramstage-y += tables.c +ramstage-y += memset.S +ramstage-y += memcpy.S +ramstage-y += memmove.S + +rmodules-y += memset.S +rmodules-y += memcpy.S +rmodules-y += memmove.S +rmodules-y += eabi_compat.c + +VBOOT_STUB_DEPS += $(obj)/arch/arm64/eabi_compat.rmodules.o + +$(eval $(call create_class_compiler,rmodules,arm64)) + +ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c + +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c + +# Build the ramstage + +$(objcbfs)/ramstage.debug: $$(ramstage-objs) $(src)/arch/arm64/ramstage.ld $(obj)/ldoptions + @printf " CC $(subst $(obj)/,,$(@))\n" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) + $(LD_ramstage) -nostdlib -m armelf_linux_eabi --gc-sections -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) --end-group -T $(src)/arch/arm64/ramstage.ld +else + $(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -Wl,--gc-sections -static -o $@ -L$(obj) -Wl,--start-group $(ramstage-objs) -Wl,--end-group -T $(src)/arch/arm64/ramstage.ld +endif + +endif # CONFIG_ARCH_RAMSTAGE_ARM64 diff --git a/src/arch/arm64/armv8/Kconfig b/src/arch/arm64/armv8/Kconfig new file mode 100644 index 0000000000..fc2e6680b1 --- /dev/null +++ b/src/arch/arm64/armv8/Kconfig @@ -0,0 +1,9 @@ +config ARCH_BOOTBLOCK_ARM_V8_64 + def_bool n + select ARCH_BOOTBLOCK_ARM64 +config ARCH_ROMSTAGE_ARM_V8_64 + def_bool n + select ARCH_ROMSTAGE_ARM64 +config ARCH_RAMSTAGE_ARM_V8_64 + def_bool n + select ARCH_RAMSTAGE_ARM64 diff --git a/src/arch/arm64/armv8/Makefile.inc b/src/arch/arm64/armv8/Makefile.inc new file mode 100644 index 0000000000..973b391dd4 --- /dev/null +++ b/src/arch/arm64/armv8/Makefile.inc @@ -0,0 +1,74 @@ +################################################################################ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2014 The ChromiumOS Authors +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## +################################################################################ + +armv8_flags = -march=armv8-a -I$(src)/arch/arm64/include/armv8/ -D__COREBOOT_ARM_ARCH__=8 + +armv8_asm_flags = $(armv8_flags) + +################################################################################ +## bootblock +################################################################################ +ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARM_V8_64),y) + +ifneq ($(CONFIG_ARM_BOOTBLOCK_CUSTOM),y) +bootblock-y += bootblock.S +endif +bootblock-$(CONFIG_ARM_BOOTBLOCK_SIMPLE) += bootblock_simple.c +bootblock-$(CONFIG_ARM_BOOTBLOCK_NORMAL) += bootblock_normal.c +bootblock-y += cache.c +bootblock-y += cpu.S +bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception.c +bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception_asm.S + +bootblock-c-ccopts += $(armv8_flags) +bootblock-S-ccopts += $(armv8_asm_flags) + +endif + +################################################################################ +## romstage +################################################################################ +ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM_V8_64),y) + +romstage-y += cache.c +romstage-y += cpu.S +romstage-y += exception.c +romstage-y += exception_asm.S + +romstage-c-ccopts += $(armv8_flags) +romstage-S-ccopts += $(armv8_asm_flags) + +endif + +################################################################################ +## ramstage +################################################################################ +ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM_V8_64),y) + +ramstage-y += cache.c +ramstage-y += cpu.S +ramstage-y += exception.c +ramstage-y += exception_asm.S + +ramstage-c-ccopts += $(armv8_flags) +ramstage-S-ccopts += $(armv8_asm_flags) + +endif diff --git a/src/arch/aarch64/bootblock.inc b/src/arch/arm64/armv8/bootblock.S similarity index 100% rename from src/arch/aarch64/bootblock.inc rename to src/arch/arm64/armv8/bootblock.S diff --git a/src/arch/aarch64/bootblock_simple.c b/src/arch/arm64/armv8/bootblock_simple.c similarity index 95% rename from src/arch/aarch64/bootblock_simple.c rename to src/arch/arm64/armv8/bootblock_simple.c index f89e272818..d8339d1f76 100644 --- a/src/arch/aarch64/bootblock_simple.c +++ b/src/arch/arm64/armv8/bootblock_simple.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright 2010 Google Inc. + * Copyright 2014 Google Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -39,7 +39,7 @@ static int boot_cpu(void) void main(void) { - const char *stage_name = "fallback/romstage"; + const char *stage_name = CONFIG_CBFS_PREFIX"/romstage"; void *entry = NULL; /* Globally disable MMU, caches, and branch prediction (these should diff --git a/src/arch/aarch64/cache.c b/src/arch/arm64/armv8/cache.c similarity index 97% rename from src/arch/aarch64/cache.c rename to src/arch/arm64/armv8/cache.c index d8d3ad94a9..a0eff46e20 100644 --- a/src/arch/aarch64/cache.c +++ b/src/arch/arm64/armv8/cache.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright 2013 Google Inc. + * Copyright 2014 Google Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -31,7 +31,7 @@ * Reference: ARM Architecture Reference Manual, ARMv8-A edition */ -//#include +#include #include @@ -54,7 +54,7 @@ unsigned int dcache_line_bytes(void) ccsidr = read_ccsidr(); /* [2:0] - Indicates (Log2(number of words in cache line)) - 4 */ line_bytes = 1 << ((ccsidr & 0x7) + 4); /* words per line */ - line_bytes *= sizeof(unsigned int); /* bytes per line */ + line_bytes *= sizeof(uint32_t); /* bytes per word */ return line_bytes; } diff --git a/src/arch/aarch64/cpu.S b/src/arch/arm64/armv8/cpu.S similarity index 100% rename from src/arch/aarch64/cpu.S rename to src/arch/arm64/armv8/cpu.S diff --git a/src/arch/aarch64/exception.c b/src/arch/arm64/armv8/exception.c similarity index 100% rename from src/arch/aarch64/exception.c rename to src/arch/arm64/armv8/exception.c diff --git a/src/arch/aarch64/exception_asm.S b/src/arch/arm64/armv8/exception_asm.S similarity index 100% rename from src/arch/aarch64/exception_asm.S rename to src/arch/arm64/armv8/exception_asm.S diff --git a/src/arch/aarch64/boot.c b/src/arch/arm64/boot.c similarity index 100% rename from src/arch/aarch64/boot.c rename to src/arch/arm64/boot.c diff --git a/src/arch/aarch64/bootblock.lds b/src/arch/arm64/bootblock.ld similarity index 80% rename from src/arch/aarch64/bootblock.lds rename to src/arch/arm64/bootblock.ld index 2f7532c849..acce1f13f2 100644 --- a/src/arch/aarch64/bootblock.lds +++ b/src/arch/arm64/bootblock.ld @@ -18,31 +18,35 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +/* We use ELF as output format. So that we can debug the code in some form. */ OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64") OUTPUT_ARCH(aarch64) +INCLUDE ldoptions PHDRS { to_load PT_LOAD; } +ENTRY(_start) TARGET(binary) SECTIONS { - ROMLOC = CONFIG_BOOTBLOCK_BASE; + . = CONFIG_BOOTBLOCK_BASE; - /* This section might be better named .setup */ - .rom ROMLOC : { - _rom = .; - *(.start); - *(.id); + .bootblock . : { + *(.text._start); + KEEP(*(.id)); *(.text); *(.text.*); - *(.rom.text); - *(.rom.data); - *(.rom.data.*); + *(.rodata); *(.rodata.*); - _erom = .; + *(.data); + *(.data.*); + *(.bss); + *(.bss.*); + *(.sbss); + *(.sbss.*); } : to_load = 0xff /DISCARD/ : { diff --git a/src/arch/aarch64/cbmem.c b/src/arch/arm64/cbmem.c similarity index 100% rename from src/arch/aarch64/cbmem.c rename to src/arch/arm64/cbmem.c diff --git a/src/arch/arm64/cpu.c b/src/arch/arm64/cpu.c new file mode 100644 index 0000000000..f90c759559 --- /dev/null +++ b/src/arch/arm64/cpu.c @@ -0,0 +1,42 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ +#include +#include + +/* Return the cpu struct which is at the high memory address of the stack. + */ +struct cpu_info *cpu_info(void) +{ + uintptr_t addr = ALIGN((uintptr_t)__builtin_frame_address(0), + CONFIG_STACK_SIZE); + addr -= sizeof(struct cpu_info); + return (void *)addr; +} + diff --git a/src/arch/aarch64/include/utils.h b/src/arch/arm64/div0.c similarity index 57% rename from src/arch/aarch64/include/utils.h rename to src/arch/arm64/div0.c index 828b86cb36..ab06ad3bee 100644 --- a/src/arch/aarch64/include/utils.h +++ b/src/arch/arm64/div0.c @@ -1,7 +1,6 @@ /* - * (C) Copyright 2010 - * Texas Instruments, - * Aneesh V + * (C) Copyright 2002 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this * project. @@ -13,7 +12,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -21,36 +20,14 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ -#ifndef _UTILS_H_ -#define _UTILS_H_ -static inline s32 log_2_n_round_up(u32 n) +#include + +void __div0(void); // called from asm so no need for a prototype in a header + +/* Replacement (=dummy) for GNU/Linux division-by zero handler */ +/* recursion is ok here because we have no formats ... */ +void __div0 (void) { - s32 log2n = -1; - u32 temp = n; - - while (temp) { - log2n++; - temp >>= 1; - } - - if (n & (n - 1)) - return log2n + 1; /* not power of 2 - round up */ - else - return log2n; /* power of 2 */ + printk(BIOS_EMERG, "DIVIDE BY ZERO! continuing ... \n"); } - -static inline s32 log_2_n_round_down(u32 n) -{ - s32 log2n = -1; - u32 temp = n; - - while (temp) { - log2n++; - temp >>= 1; - } - - return log2n; -} - -#endif diff --git a/src/arch/arm64/eabi_compat.c b/src/arch/arm64/eabi_compat.c new file mode 100644 index 0000000000..c27c54e350 --- /dev/null +++ b/src/arch/arm64/eabi_compat.c @@ -0,0 +1,28 @@ +/* + * Utility functions needed for (some) EABI conformant tool chains. + * + * (C) Copyright 2009 Wolfgang Denk + * + * This program is Free Software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + */ + +#include + +int raise (int signum) __attribute__((used)); +int raise (int signum) +{ + return 0; +} + +void __aeabi_unwind_cpp_pr0(void) __attribute__((used)); +void __aeabi_unwind_cpp_pr0(void) +{ +}; + +void __aeabi_unwind_cpp_pr1(void) __attribute__((used)); +void __aeabi_unwind_cpp_pr1(void) +{ +}; diff --git a/src/arch/aarch64/early_console.c b/src/arch/arm64/early_console.c similarity index 100% rename from src/arch/aarch64/early_console.c rename to src/arch/arm64/early_console.c diff --git a/src/arch/aarch64/id.inc b/src/arch/arm64/id.S similarity index 96% rename from src/arch/aarch64/id.inc rename to src/arch/arm64/id.S index ffe547d748..a588f1e1da 100644 --- a/src/arch/aarch64/id.inc +++ b/src/arch/arm64/id.S @@ -1,3 +1,5 @@ +#include + .section ".id", "a", %progbits .globl __id_start diff --git a/src/arch/aarch64/include/arch/asm.h b/src/arch/arm64/include/arch/asm.h similarity index 91% rename from src/arch/aarch64/include/arch/asm.h rename to src/arch/arm64/include/arch/asm.h index f122c4d63a..7760bad850 100644 --- a/src/arch/aarch64/include/arch/asm.h +++ b/src/arch/arm64/include/arch/asm.h @@ -17,8 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef __ARM_AARCH64_ASM_H -#define __ARM_AARCH64_ASM_H +#ifndef __ARM_ARM64_ASM_H +#define __ARM_ARM64_ASM_H #define ALIGN .align 0 @@ -35,4 +35,4 @@ #define END(name) \ .size name, .-name -#endif /* __ARM_AARCH64_ASM_H */ +#endif /* __ARM_ARM64_ASM_H */ diff --git a/src/arch/aarch64/include/arch/boot/boot.h b/src/arch/arm64/include/arch/boot/boot.h similarity index 69% rename from src/arch/aarch64/include/arch/boot/boot.h rename to src/arch/arm64/include/arch/boot/boot.h index 2051d9a83f..16763c68f6 100644 --- a/src/arch/aarch64/include/arch/boot/boot.h +++ b/src/arch/arm64/include/arch/boot/boot.h @@ -1,5 +1,5 @@ -#ifndef ASM_ARM_BOOT_H -#define ASM_ARM_BOOT_H +#ifndef ASM_ARM64_BOOT_H +#define ASM_ARM64_BOOT_H #define ELF_CLASS ELFCLASS64 #define ELF_DATA ELFDATA2LSB diff --git a/src/arch/aarch64/include/arch/byteorder.h b/src/arch/arm64/include/arch/byteorder.h similarity index 100% rename from src/arch/aarch64/include/arch/byteorder.h rename to src/arch/arm64/include/arch/byteorder.h diff --git a/src/arch/aarch64/include/arch/early_variables.h b/src/arch/arm64/include/arch/early_variables.h similarity index 100% rename from src/arch/aarch64/include/arch/early_variables.h rename to src/arch/arm64/include/arch/early_variables.h diff --git a/src/arch/aarch64/include/arch/hlt.h b/src/arch/arm64/include/arch/hlt.h similarity index 100% rename from src/arch/aarch64/include/arch/hlt.h rename to src/arch/arm64/include/arch/hlt.h diff --git a/src/arch/aarch64/include/arch/io.h b/src/arch/arm64/include/arch/io.h similarity index 100% rename from src/arch/aarch64/include/arch/io.h rename to src/arch/arm64/include/arch/io.h diff --git a/src/arch/aarch64/include/arch/pci_ops.h b/src/arch/arm64/include/arch/pci_ops.h similarity index 93% rename from src/arch/aarch64/include/arch/pci_ops.h rename to src/arch/arm64/include/arch/pci_ops.h index 149bf35c5f..26a2c9b3ad 100644 --- a/src/arch/aarch64/include/arch/pci_ops.h +++ b/src/arch/arm64/include/arch/pci_ops.h @@ -17,8 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef ARCH_AARCH64_PCI_OPS_H -#define ARCH_AARCH64_PCI_OPS_H +#ifndef ARCH_ARM64_PCI_OPS_H +#define ARCH_ARM64_PCI_OPS_H /* V8 has PCI in some form. We will need to fill this in. */ static inline const struct pci_bus_operations *pci_config_default(void) diff --git a/src/arch/aarch64/include/arch/stages.h b/src/arch/arm64/include/arch/stages.h similarity index 100% rename from src/arch/aarch64/include/arch/stages.h rename to src/arch/arm64/include/arch/stages.h diff --git a/src/arch/aarch64/include/arch/barrier.h b/src/arch/arm64/include/armv8/arch/barrier.h similarity index 100% rename from src/arch/aarch64/include/arch/barrier.h rename to src/arch/arm64/include/armv8/arch/barrier.h diff --git a/src/arch/aarch64/include/arch/cache.h b/src/arch/arm64/include/armv8/arch/cache.h similarity index 81% rename from src/arch/aarch64/include/arch/cache.h rename to src/arch/arm64/include/armv8/arch/cache.h index 048fc32372..325b85757b 100644 --- a/src/arch/aarch64/include/arch/cache.h +++ b/src/arch/arm64/include/armv8/arch/cache.h @@ -26,11 +26,11 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * cache.h: Cache maintenance API for AARCH64 + * cache.h: Cache maintenance API for ARM64 */ -#ifndef ARM_AARCH64_CACHE_H -#define ARM_AARCH64_CACHE_H +#ifndef ARM_ARM64_CACHE_H +#define ARM_ARM64_CACHE_H #include #include @@ -216,44 +216,6 @@ static inline void write_csselr(uint32_t val) isb(); /* ISB to sync the change to CCSIDR_EL1 */ } -#if 0 - -/* read L2 control register (L2CTLR) */ -static inline uint32_t read_l2ctlr(void) -{ - uint32_t val = 0; - asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val)); - return val; -} - -/* write L2 control register (L2CTLR) */ -static inline void write_l2ctlr(uint32_t val) -{ - /* - * Note: L2CTLR can only be written when the L2 memory system - * is idle, ie before the MMU is enabled. - */ - asm volatile("mcr p15, 1, %0, c9, c0, 2" : : "r" (val) : "memory" ); - isb(); -} - -/* read L2 Auxiliary Control Register (L2ACTLR) */ -static inline uint32_t read_l2actlr(void) -{ - uint32_t val = 0; - asm volatile ("mrc p15, 1, %0, c15, c0, 0" : "=r" (val)); - return val; -} - -/* write L2 Auxiliary Control Register (L2ACTLR) */ -static inline void write_l2actlr(uint32_t val) -{ - asm volatile ("mcr p15, 1, %0, c15, c0, 0" : : "r" (val) : "memory" ); - isb(); -} - -#endif - /* read system control register (SCTLR_ELx) */ static inline uint32_t read_sctlr(uint32_t el) { @@ -269,18 +231,6 @@ static inline void write_sctlr(uint32_t val, uint32_t el) isb(); } -/* - * Cache maintenance API - */ - -#if 0 - -/* dcache clean and invalidate all (on current level given by CCSELR) */ -void dcache_clean_invalidate_all(void); - -void dcache_clean_all(void); - -#endif /* dcache clean by virtual address to PoC */ void dcache_clean_by_va(void const *addr, size_t len); @@ -309,27 +259,4 @@ void cache_sync_instructions(void); /* tlb invalidate all */ void tlb_invalidate_all(void); -/* - * Generalized setup/init functions - */ - -#if 0 - -/* mmu initialization (set page table address, set permissions, etc) */ -void mmu_init(void); - -enum dcache_policy { - DCACHE_OFF, - DCACHE_WRITEBACK, - DCACHE_WRITETHROUGH, -}; - -/* disable the mmu for a range. Primarily useful to lock out address 0. */ -void mmu_disable_range(unsigned long start_mb, unsigned long size_mb); -/* mmu range configuration (set dcache policy) */ -void mmu_config_range(unsigned long start_mb, unsigned long size_mb, - enum dcache_policy policy); - -#endif - -#endif /* ARM_AARCH64_CACHE_H */ +#endif /* ARM_ARM64_CACHE_H */ diff --git a/src/arch/aarch64/include/arch/cpu.h b/src/arch/arm64/include/armv8/arch/cpu.h similarity index 97% rename from src/arch/aarch64/include/arch/cpu.h rename to src/arch/arm64/include/armv8/arch/cpu.h index f8b3005e95..5a8f14560d 100644 --- a/src/arch/aarch64/include/arch/cpu.h +++ b/src/arch/arm64/include/armv8/arch/cpu.h @@ -48,4 +48,5 @@ struct cpuinfo_arm { #endif +struct cpu_info *cpu_info(void); #endif /* __ARCH_CPU_H__ */ diff --git a/src/arch/aarch64/include/arch/exception.h b/src/arch/arm64/include/armv8/arch/exception.h similarity index 100% rename from src/arch/aarch64/include/arch/exception.h rename to src/arch/arm64/include/armv8/arch/exception.h diff --git a/src/arch/aarch64/include/arch/rules.h b/src/arch/arm64/include/armv8/arch/rules.h similarity index 100% rename from src/arch/aarch64/include/arch/rules.h rename to src/arch/arm64/include/armv8/arch/rules.h diff --git a/src/arch/aarch64/include/bootblock_common.h b/src/arch/arm64/include/bootblock_common.h similarity index 100% rename from src/arch/aarch64/include/bootblock_common.h rename to src/arch/arm64/include/bootblock_common.h diff --git a/src/arch/aarch64/include/clocks.h b/src/arch/arm64/include/clocks.h similarity index 100% rename from src/arch/aarch64/include/clocks.h rename to src/arch/arm64/include/clocks.h diff --git a/src/arch/aarch64/include/smp/spinlock.h b/src/arch/arm64/include/smp/spinlock.h similarity index 58% rename from src/arch/aarch64/include/smp/spinlock.h rename to src/arch/arm64/include/smp/spinlock.h index 8052616bbb..8a89d1f011 100644 --- a/src/arch/aarch64/include/smp/spinlock.h +++ b/src/arch/arm64/include/smp/spinlock.h @@ -1,6 +1,6 @@ #ifndef ARCH_SMP_SPINLOCK_H #define ARCH_SMP_SPINLOCK_H -#error "spinlocks: implement this for AARCH64" +#error "spinlocks: implement this for ARM64" #endif diff --git a/src/arch/aarch64/include/stdint.h b/src/arch/arm64/include/stdint.h similarity index 94% rename from src/arch/aarch64/include/stdint.h rename to src/arch/arm64/include/stdint.h index f1923468de..2907d8eae6 100644 --- a/src/arch/aarch64/include/stdint.h +++ b/src/arch/arm64/include/stdint.h @@ -1,5 +1,5 @@ -#ifndef ARM_STDINT_H -#define ARM_STDINT_H +#ifndef ARM64_STDINT_H +#define ARM64_STDINT_H /* Exact integral types */ typedef unsigned char uint8_t; @@ -57,4 +57,4 @@ typedef int64_t s64; typedef s64 intptr_t; typedef u64 uintptr_t; -#endif /* ARM_STDINT_H */ +#endif /* ARM64_STDINT_H */ diff --git a/src/arch/arm64/memcpy.S b/src/arch/arm64/memcpy.S new file mode 100644 index 0000000000..ccad4cf8cc --- /dev/null +++ b/src/arch/arm64/memcpy.S @@ -0,0 +1,52 @@ +/* + * Copyright (C) 2013 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include + +/* + * Copy a buffer from src to dest (alignment handled by the hardware) + * + * Parameters: + * x0 - dest + * x1 - src + * x2 - n + * Returns: + * x0 - dest + */ +ENTRY(memcpy) + mov x4, x0 + subs x2, x2, #8 + b.mi 2f +1: ldr x3, [x1], #8 + subs x2, x2, #8 + str x3, [x4], #8 + b.pl 1b +2: adds x2, x2, #4 + b.mi 3f + ldr w3, [x1], #4 + sub x2, x2, #4 + str w3, [x4], #4 +3: adds x2, x2, #2 + b.mi 4f + ldrh w3, [x1], #2 + sub x2, x2, #2 + strh w3, [x4], #2 +4: adds x2, x2, #1 + b.mi 5f + ldrb w3, [x1] + strb w3, [x4] +5: ret +ENDPROC(memcpy) diff --git a/src/arch/arm64/memmove.S b/src/arch/arm64/memmove.S new file mode 100644 index 0000000000..1f9e2638ab --- /dev/null +++ b/src/arch/arm64/memmove.S @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2013 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +/* + * Move a buffer from src to test (alignment handled by the hardware). + * If dest <= src, call memcpy, otherwise copy in reverse order. + * + * Parameters: + * x0 - dest + * x1 - src + * x2 - n + * Returns: + * x0 - dest + */ +ENTRY(memmove) + cmp x0, x1 + b.ls memcpy + add x4, x0, x2 + add x1, x1, x2 + subs x2, x2, #8 + b.mi 2f +1: ldr x3, [x1, #-8]! + subs x2, x2, #8 + str x3, [x4, #-8]! + b.pl 1b +2: adds x2, x2, #4 + b.mi 3f + ldr w3, [x1, #-4]! + sub x2, x2, #4 + str w3, [x4, #-4]! +3: adds x2, x2, #2 + b.mi 4f + ldrh w3, [x1, #-2]! + sub x2, x2, #2 + strh w3, [x4, #-2]! +4: adds x2, x2, #1 + b.mi 5f + ldrb w3, [x1, #-1] + strb w3, [x4, #-1] +5: ret +ENDPROC(memmove) diff --git a/src/arch/aarch64/memset.S b/src/arch/arm64/memset.S similarity index 100% rename from src/arch/aarch64/memset.S rename to src/arch/arm64/memset.S diff --git a/src/arch/aarch64/ramstage.ld b/src/arch/arm64/ramstage.ld similarity index 100% rename from src/arch/aarch64/ramstage.ld rename to src/arch/arm64/ramstage.ld diff --git a/src/arch/aarch64/romstage.ld b/src/arch/arm64/romstage.ld similarity index 81% rename from src/arch/aarch64/romstage.ld rename to src/arch/arm64/romstage.ld index 029bd8bd2f..d05fdd1861 100644 --- a/src/arch/aarch64/romstage.ld +++ b/src/arch/arm64/romstage.ld @@ -1,7 +1,7 @@ /* * Memory map: * - * CONFIG_RAMBASE : text segment + * CONFIG_ROMSTAGE_BASE : text segment * : rodata segment * : data segment * : bss segment @@ -19,34 +19,41 @@ * 2005.12 yhlu add ramstage cross the vga font buffer handling */ +/* We use ELF as output format. So that we can debug the code in some form. */ +/* + INCLUDE ldoptions + */ + /* We use ELF as output format. So that we can debug the code in some form. */ OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64") OUTPUT_ARCH(aarch64) - -ENTRY(stage_entry) +INCLUDE ldoptions PHDRS { to_load PT_LOAD; } +ENTRY(stage_entry) + SECTIONS { - /* TODO make this a configurable option (per chipset). */ . = CONFIG_ROMSTAGE_BASE; .romtext . : { - _rom = .; _start = .; *(.text.stage_entry.aarch64); *(.text.startup); *(.text); + *(.text.*); } : to_load .romdata . : { *(.rodata); + *(.rodata.*); *(.machine_param); *(.data); + *(.data.*); . = ALIGN(8); _erom = .; } @@ -61,12 +68,16 @@ SECTIONS . = ALIGN(8); _bss = .; *(.bss) + *(.bss.*) *(.sbss) - *(COMMON) + *(.sbss.*) + _ebss = .; } - _ebss = .; + _end = .; + preram_cbmem_console = CONFIG_CBMEM_CONSOLE_PRERAM_BASE; + /* Discard the sections we don't need/want */ /DISCARD/ : { *(.comment) diff --git a/src/arch/aarch64/stages.c b/src/arch/arm64/stages.c similarity index 66% rename from src/arch/aarch64/stages.c rename to src/arch/arm64/stages.c index 6332dbc194..e1ab21aadf 100644 --- a/src/arch/aarch64/stages.c +++ b/src/arch/arm64/stages.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright 2012 Google Inc. + * Copyright 2014 Google Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -20,12 +20,7 @@ /* * This file contains entry/exit functions for each stage during coreboot * execution (bootblock entry and ramstage exit will depend on external - * loading. - * - * Unlike other files, this one should be compiled with a -m option to - * specify a pre-determined instruction set. This is to ensure consistency - * in the CPU operating mode (ARM or Thumb) when hand-off between stages - * occurs. + * loading). * * Entry points must be placed at the location the previous stage jumps * to (the lowest address in the stage image). This is done by giving @@ -35,25 +30,24 @@ #include #include -#include void stage_entry(void) { main(); } -/* we had marked 'doit' as 'noreturn'. There is no apparent harm in - * leaving it as something we can return from, and in the one case - * where we call a payload, the payload is allowed to return. Hence, - * leave it as something we can return from. +/* we had marked 'doit' as 'noreturn'. + * There is no apparent harm in leaving it as something we can return from, and in the one + * case where we call a payload, the payload is allowed to return. + * Hence, leave it as something we can return from. */ void stage_exit(void *addr) { void (*doit)(void) = addr; - /* make sure any code we installed is written to memory. Not all ARM have - * unified caches. + /* + * Most stages load code so we need to sync caches here. Should maybe + * go into cbfs_load_stage() instead... */ - cache_sync_instructions(); doit(); } diff --git a/src/arch/aarch64/tables.c b/src/arch/arm64/tables.c similarity index 82% rename from src/arch/aarch64/tables.c rename to src/arch/arm64/tables.c index ce7ad5ae5e..49fab9f3d2 100644 --- a/src/arch/aarch64/tables.c +++ b/src/arch/arm64/tables.c @@ -29,6 +29,15 @@ #define MAX_COREBOOT_TABLE_SIZE (8 * 1024) +#if ! CONFIG_DYNAMIC_CBMEM +/* + * TODO: "High" tables are a convention used on x86. Maybe we can + * clean up that naming at some point. + */ +uint64_t high_tables_base = 0; +uint64_t high_tables_size; +#endif + void cbmem_arch_init(void) { } @@ -37,6 +46,14 @@ struct lb_memory *write_tables(void) { unsigned long table_pointer, new_table_pointer; +#if ! CONFIG_DYNAMIC_CBMEM + if (!high_tables_base) { + printk(BIOS_ERR, "ERROR: high_tables_base is not set.\n"); + } + + printk(BIOS_DEBUG, "high_tables_base: %llx.\n", high_tables_base); +#endif + post_code(0x9d); table_pointer = (unsigned long)cbmem_add(CBMEM_ID_CBTABLE, diff --git a/src/arch/arm64/timestamp.c b/src/arch/arm64/timestamp.c new file mode 100644 index 0000000000..e6a8159c95 --- /dev/null +++ b/src/arch/arm64/timestamp.c @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + */ + +#include +#include + +uint64_t timestamp_get(void) +{ + struct mono_time timestamp; + timer_monotonic_get(×tamp); + return (uint64_t)timestamp.microseconds; +} + diff --git a/toolchain.inc b/toolchain.inc index dfb0129f37..1b47d19fb0 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -23,13 +23,13 @@ ARCH_SUPPORTED := ARM ARM64 X86_32 ARCH_TO_TOOLCHAIN_X86_32 := x86_32 ARCH_TO_TOOLCHAIN_ARM := arm -ARCH_TO_TOOLCHAIN_ARM64 := aarch64 +ARCH_TO_TOOLCHAIN_ARM64 := arm64 COREBOOT_STANDARD_STAGES := bootblock romstage ramstage ARCHDIR-i386 := x86 ARCHDIR-arm := arm -ARCHDIR-aarch64 := arm64 +ARCHDIR-arm64 := arm64 ARCHDIR-x86_32 := x86 CFLAGS_arm := -mno-unaligned-access -ffunction-sections -fdata-sections @@ -83,6 +83,7 @@ init_stages = \ # This mapping is created to have consistency with xcompile naming $(eval $(call create_class_compiler,x86_32,i386)) +$(eval $(call create_class_compiler,arm64,aarch64)) $(eval $(call toolchain_to_dir)) diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c index d1e1c9f1d1..925084dbba 100644 --- a/util/cbfstool/common.c +++ b/util/cbfstool/common.c @@ -122,7 +122,7 @@ static struct { uint32_t arch; const char *name; } arch_names[] = { - { CBFS_ARCHITECTURE_AARCH64, "aarch64" }, + { CBFS_ARCHITECTURE_AARCH64, "arm64" }, { CBFS_ARCHITECTURE_ARM, "arm" }, { CBFS_ARCHITECTURE_X86, "x86" }, { CBFS_ARCHITECTURE_UNKNOWN, "unknown" }