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include/device/pci_def.h: Add PCIe SRIOV definitions

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Add SRIOV related definitions from section 9.3 of PCI Express Base
Specification Revision 6.2.

Change-Id: Ic4bf76b0e3b20e3d04e8264c6530ab4abb95a013
Signed-off-by: Yuchi Chen <yuchi.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83319
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
This commit is contained in:
Yuchi Chen 2024-06-25 11:08:12 +08:00 • committed by Lean Sheng Tan
commit 031c078e86
1 changed files with 11 additions and 0 deletions
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11
src/include/device/pci_def.h
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@ -478,6 +478,7 @@
#define PCIE_EXT_CAP_LTR_ID 0x0018
#define PCIE_EXT_CAP_RESIZABLE_BAR 0x0015
#define PCIE_EXT_CAP_RCECEA_ID 0x0007
#define PCIE_EXT_CAP_SRIOV_ID 0x0010
/* Secondary PCI Express Extended Capability Structure */
#define PCI_EXP_SEC_CAP_ID 0x19
@ -579,6 +580,16 @@
#define PCI_RCECEA_BITMAP 4
#define PCI_RCECEA_BUSNUM 8
/*
* Single Root IO Virtualization
* Section 9.3 of PCI Express Base Specification Revision 6.2.
*/
#define PCIE_EXT_CAP_SRIOV_TOTAL_VFS 0x0e
#define PCIE_EXT_CAP_SRIOV_SUPPORTED_PAGE_SIZE 0x1c
#define PCIE_EXT_CAP_SRIOV_SYSTEM_PAGE_SIZE 0x20
#define PCIE_EXT_CAP_SRIOV_VF_BAR0 0x24
#define PCIE_EXT_CAP_SRIOV_VF_BAR5 0x38
/*
* The PCI interface treats multi-function devices as independent
* devices. The slot/function address of each device is encoded