erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

fix more warnings.

Browse source 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@99 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Stefan Reinauer 2007-02-23 12:36:45 +00:00
commit 02a4d350c6
3 changed files with 7 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

6
arch/x86/cachemain.c
View file

@ -30,6 +30,10 @@ void console_init(void);
void die(const char *msg);
int find_file(struct mem_file *archive, char *filename, struct mem_file *result);
// Is this value correct?
#define DCACHE_RAM_SIZE 0x8000
void post_code(u8 value)
{
outb(value, 0x80);
@ -56,7 +60,7 @@ static void enable_rom(void)
void stage1_main(u32 bist)
{
int ret;
struct mem_file archive, result;
struct mem_file archive;
post_code(0x02);

2
arch/x86/console.c
View file

@ -20,7 +20,7 @@
extern int vtxprintf(void (*)(unsigned char), const char *, va_list);
extern void uart8250_tx_byte(unsigned, unsigned char);
int console_loglevel()
int console_loglevel(void)
{
return 8;
}

2
util/lar/Makefile
View file

@ -24,7 +24,7 @@ $(obj)/util/lar/lar: $(patsubst %,$(src)/util/lar/%,$(SOURCE))
$(Q)printf "Building LAR utility..."
$(Q)mkdir -p $(obj)/util/lar
$(Q)$(HOSTCC) $(HOSTCFLAGS) -o $@ $^
$(Q)printf "done."
$(Q)printf "done.\n"
## --------------------------------------------------------------------