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tegra124: use RAM_CODE[3:2] for ram code

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BootROM uses RAM_CODE[3:2] value as index to retrieve boot device
array in BCT to reconfigure device. Since there will be one kind
of boot device, we can reuse RAM_CODE[3:2] in conjunction with
RAM_CODE[1:0] to select up to 16 RAM parameters. To support this
change without leading BootROM to read wrong boot device parameters,
we need to fill up boot device array.

BUG=none
TEST=emerge-nyan chromeos-coreboot-nyan # boots successfully.

Change-Id: I901e052bc785561cfcb25fb24cf4629572af390a
Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/183833
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Gabe Black <gabeblack@chromium.org>
This commit is contained in:
Jimmy Zhang 2014-01-24 15:02:46 -08:00 • committed by chrome-internal-fetch
commit 0154239467
1 changed files with 17 additions and 0 deletions
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17
src/mainboard/google/nyan/bct/spi.cfg
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@ -14,3 +14,20 @@ DeviceParam[0].SpiFlashParams.ClockDivider = 0x16;
DeviceParam[0].SpiFlashParams.ClockSource = NvBootSpiClockSource_PllPOut0;
DeviceParam[0].SpiFlashParams.PageSize2kor16k = 0;
DevType[1] = NvBootDevType_Spi;
DeviceParam[1].SpiFlashParams.ReadCommandTypeFast = NV_FALSE;
DeviceParam[1].SpiFlashParams.ClockDivider = 0x16;
DeviceParam[1].SpiFlashParams.ClockSource = NvBootSpiClockSource_PllPOut0;
DeviceParam[1].SpiFlashParams.PageSize2kor16k = 0;
DevType[2] = NvBootDevType_Spi;
DeviceParam[2].SpiFlashParams.ReadCommandTypeFast = NV_FALSE;
DeviceParam[2].SpiFlashParams.ClockDivider = 0x16;
DeviceParam[2].SpiFlashParams.ClockSource = NvBootSpiClockSource_PllPOut0;
DeviceParam[2].SpiFlashParams.PageSize2kor16k = 0;
DevType[3] = NvBootDevType_Spi;
DeviceParam[3].SpiFlashParams.ReadCommandTypeFast = NV_FALSE;
DeviceParam[3].SpiFlashParams.ClockDivider = 0x16;
DeviceParam[3].SpiFlashParams.ClockSource = NvBootSpiClockSource_PllPOut0;
DeviceParam[3].SpiFlashParams.PageSize2kor16k = 0;