From 0016bd533864942225f2fb8e08ce871a186f2746 Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Fri, 14 Nov 2014 15:42:42 -0700 Subject: [PATCH] t132: Add routine to enable all audio periphs under AHUB If all devices under AHUB (AUDIO/I2S/DAM/ADX/etc) aren't clocked and taken out of reset, any access to any audio peripheral will hang the system. BUG=none BRANCH=none TEST=built both Rush and Ryu OK. Change-Id: I741d5ba4dd8bd963b6d261fbf41cfb77c274cb79 Signed-off-by: Tom Warren Reviewed-on: https://chromium-review.googlesource.com/229910 Reviewed-by: Aaron Durbin Commit-Queue: Mike Frysinger --- src/soc/nvidia/tegra132/clock.c | 18 ++++++++++++++++++ src/soc/nvidia/tegra132/include/soc/clock.h | 1 + 2 files changed, 19 insertions(+) diff --git a/src/soc/nvidia/tegra132/clock.c b/src/soc/nvidia/tegra132/clock.c index 7eaeb8d647..634a702a8e 100644 --- a/src/soc/nvidia/tegra132/clock.c +++ b/src/soc/nvidia/tegra132/clock.c @@ -709,3 +709,21 @@ void clock_reset_x(u32 bit) clock_reset_dev(CLK_RST_REG(rst_dev_x_set), CLK_RST_REG(rst_dev_x_clr), bit); } + +/* Enable/unreset all audio toys under AHUB */ +void clock_enable_audio(void) +{ + /* + * Confirmed by NVIDIA hardware team, we need to take ALL audio devices + * connected to AHUB (AUDIO, APBIF, I2S, DAM, AMX, ADX, SPDIF, AFC) out + * of reset and clock-enabled, otherwise reading AHUB devices (in our + * case, I2S/APBIF/AUDIO) will hang. + */ + clock_enable_clear_reset(CLK_L_I2S0 | CLK_L_I2S1 | CLK_L_I2S2 | CLK_L_SPDIF, + 0, 0, + CLK_V_I2S3 | CLK_V_I2S4 | CLK_V_AUDIO | CLK_V_APBIF | + CLK_V_DAM0 | CLK_V_DAM1 | CLK_V_DAM2 | CLK_V_EXTPERIPH1, + CLK_W_AMX0 | CLK_W_ADX0, + CLK_X_ADX1 | CLK_X_AFC0 | CLK_X_AFC1 | CLK_X_AFC2 | + CLK_X_AFC3 | CLK_X_AFC4 | CLK_X_AFC5 | CLK_X_AMX1); +} diff --git a/src/soc/nvidia/tegra132/include/soc/clock.h b/src/soc/nvidia/tegra132/include/soc/clock.h index b0e7dc87e6..34693cba19 100644 --- a/src/soc/nvidia/tegra132/include/soc/clock.h +++ b/src/soc/nvidia/tegra132/include/soc/clock.h @@ -394,6 +394,7 @@ void clock_init(void); void clock_init_arm_generic_timer(void); void sor_clock_stop(void); void sor_clock_start(void); +void clock_enable_audio(void); #endif /* __SOC_NVIDIA_TEGRA132_CLOCK_H__ */